Figure 3-1. Radio Set Control Functional Block Diagram
3-2. BUS INTERFACE MODULE
Figure 3-2 is a block diagram of the bus interface module.
The decoder/timer decodes commands from the microprocessor and provides enable and clock signals as
needed. Three commands enable the f rent panel switches. One is used to sample the keyboard through the
keyboard encoder. Others are used to clock data to the front panel display and the output buffer. The DMA IN-N
signals the microprocessor that data is available for reading into memory.
The output buffer is a parallel-to-serial converter. Data to be sent to the rt is put on the data lines by the micro-
processor and clocked into the output buffer. The last data word into the buffer is a command word telling how
many bits of data and how many clocks to output to the drivers. The buffer then clocks the data out while the
microprocessor continues its program.